1. Technical Field
The present invention relates to the design and manufacture of integrated circuits, and more particularly to the determination of chip yields.
2. Description of the Related Art
Memory yield simulation techniques have traditionally only accounted for within-die independent random variation. However, chip mean variation (die-to-die) also has a significant effect on memory yield. Due to the prevalence and growing popularity of FinFET devices, the impact of chip mean variation in relation to random, within die variation on the memory yield of manufactured chips is likely to increase. Existing memory yield analysis methods cannot account for both chip mean variation and within die random variation. The yield analysis problem is a multimillion random variable problem when the independent random variations of all memory cells in an array are considered together with the chip mean variation of the array. Although the straightforward approach of using Monte Carlo simulation and the like can be employed to solve the problem, it would require significant processing resources to evaluate the integrand.